| AZPR_RTL | �g�b�v�f�B���N�g�� |
| �� top | �g�b�v���W���[�� |
| ���@�� include | �C���N���[�h�t�@�C�� |
| ���@���@�� global_config.h | �S�̐ݒ� |
| ���@���@�� nettype.h | �f�t�H���g�l�b�g�^�C�v�̎w�� |
| ���@���@�� stddef.h | ���ʂ̃}�N�� |
| ���@�� lib | ���C�u�����t�@�C�� |
| ���@���@�� x_s3e_dcm.v | �U�C�����N�XDigital Clock Manager |
| ���@���@�� x_s3e_dpram.v | �U�C�����N�X�������}�N�� �f���A���|�[�gRAM |
| ���@���@�� x_s3e_sprom.v | �U�C�����N�X�������}�N�� �V���O���|�[�gROM |
| ���@�� rtl | RTL�t�@�C�� |
| ���@���@�� chip.v | SoC�g�b�v���W���[�� |
| ���@���@�� chip_top.v | �g�b�v���W���[�� |
| ���@���@�� clk_gen.v | �N���b�N�������W���[�� |
| ���@�� test | �e�X�g�t�@�C�� |
| ���@�@�@�� chip_top_test.v | �e�X�g�x���` |
| ���@�@�@�� sim.cmd | �V�~�����[�V�����p�o�b�`�t�@�C�� |
| ���@�@�@�� test.dat | �e�X�g�v���O���� |
| �� cpu | CPU |
| ���@�� include | �C���N���[�h�t�@�C�� |
| ���@���@�� cpu.h | CPU�w�b�_ |
| ���@���@�� isa.h | ���߃Z�b�g�A�[�L�e�N�`�� |
| ���@���@�� spm.h | �X�N���b�`�p�b�h�������w�b�_ |
| ���@�� rtl | RTL�t�@�C�� |
| ���@�@�@�� alu.v | �Z�p�_�����Z���j�b�g |
| ���@�@�@�� bus_if.v | �o�X�C���^�t�F�[�X |
| ���@�@�@�� cpu.v | CPU�g�b�v���W���[�� |
| ���@�@�@�� ctrl.v | CPU���䃆�j�b�g |
| ���@�@�@�� decoder.v | ���߃f�R�[�_ |
| ���@�@�@�� ex_reg.v | EX/MEM�p�C�v���C�����W�X�^ |
| ���@�@�@�� ex_stage.v | EX�X�e�[�W |
| ���@�@�@�� gpr.v | �ėp���W�X�^ |
| ���@�@�@�� id_reg.v | ID/EX�p�C�v���C�����W�X�^ |
| ���@�@�@�� id_stage.v | ID�X�e�[�W |
| ���@�@�@�� if_reg.v | IF/ID�p�C�v���C�����W�X�^ |
| ���@�@�@�� if_stage.v | IF�X�e�[�W |
| ���@�@�@�� mem_ctrl.v | �������A�N�Z�X���䃆�j�b�g |
| ���@�@�@�� mem_reg.v | MEM/WB�p�C�v���C�����W�X�^ |
| ���@�@�@�� mem_stage.v | MEM�X�e�[�W |
| ���@�@�@�� spm.v | �X�N���b�`�p�b�h������ |
| �� bus | �o�X |
| ���@�� include | �C���N���[�h�t�@�C�� |
| ���@���@�� bus.v | �o�X�w�b�_ |
| ���@�� rtl | RTL�t�@�C�� |
| ���@�@�@�� bus.v | �o�X�g�b�v���W���[�� |
| ���@�@�@�� bus_addr_dec.v | �A�h���X�f�R�[�_ |
| ���@�@�@�� bus_arbiter.v | �o�X�A�[�r�^ |
| ���@�@�@�� bus_master_mux.v | �o�X�}�X�^�}���`�v���N�T |
| ���@�@�@�� bus_slave_mux.v | �o�X�X���[�u�}���`�v���N�T |
| �� io | I/O |
| �@�@�� gpio | GPIO |
| �@�@���@�� include | �C���N���[�h�t�@�C�� |
| �@�@���@���@�� gpio.h | GPIO�w�b�_ |
| �@�@���@�� rtl | RTL�t�@�C�� |
| �@�@���@�@�@�� gpio.v | GPIO |
| �@�@�� rom | Read Only Memory |
| �@�@���@�� include | �C���N���[�h�t�@�C�� |
| �@�@���@���@�� rom.h | ROM�w�b�_ |
| �@�@���@�� rtl | RTL�t�@�C�� |
| �@�@���@�@�@�� rom.v | ROM |
| �@�@�� timer | �^�C�} |
| �@�@���@�� include | �C���N���[�h�t�@�C�� |
| �@�@���@���@�� timer.h | �^�C�}�w�b�_ |
| �@�@���@�� rtl | RTL�t�@�C�� |
| �@�@���@�@�@��timer.v | �^�C�} |
| �@�@�� uart | UART |
| �@�@�@�@�� include | �C���N���[�h�t�@�C�� |
| �@�@�@�@���@�� uart.h | UART�w�b�_ |
| �@�@�@�@�� rtl | RTL�t�@�C�� |
| �@�@�@�@�@�@�� uart.v | UART�g�b�v���W���[�� |
| �@�@�@�@�@�@�� uart_ctrl.v | UART���䃂�W���[�� |
| �@�@�@�@�@�@�� uart_rx.v | UART��M���W���[�� |
| �@�@�@�@�@�@�� uart_tx.v | UART���M���W���[�� |